Rapid advances in electronics and communication technologies, driven by immense customer demand, have resulted in the widespread adoption of electronic devices of every kind. The fabrication processes that create the device circuitry on semiconductor dies have transitioned through many different manufacturing process nodes in the last four decades, from 6 μm processes in the mid-1970s to 10 nm processes targeted for 2016-2017. The ever increasing density, functionality, and complexity of the circuitry has given rise to significant challenges with the semiconductor packaging that carries the dies, including challenges with mechanically and electrically connecting the semiconductor packaging to external system circuitry.